LAN91C111I-NS SMSC, LAN91C111I-NS Datasheet - Page 92

• Manufacturer Part Number: LAN91C111I-NS
• Description: IC ETHERNET CTLR MAC PHY 128-QFP
• Manufacturer: SMSC
• Type: Single Chip MAC and PHYr

Specifications of LAN91C111I-NS

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 140 mA
• Maximum Operating Temperature: + 85 C
• Ethernet Connection Type: 100BASE-T or 100BASE-T4 or 100BASE-TX or 10BASE-T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1014

Revision 1.91 (06-01-09)
C h o o se B a n k S e le ct
C a ll A L L O C ATE
E xit D rive r S e n d
MEMORY PARTITIONING
Unlike other controllers, the LAN91C111 does not require a fixed memory partitioning between transmit
and receive resources. The MMU allocates and de-allocates memory upon different events. An
additional mechanism allows the CPU to prevent the receive process from starving the transmit
memory allocation.
Memory is always requested by the side that needs to write into it, that is: the CPU for transmit or the
MAC for receive. The CPU can control the number of bytes it requests for transmit but it cannot
determine the number of bytes the receive process is going to demand. Furthermore, the receive
process requests will be dependent on network traffic, in particular on the arrival of broadcast and
D R IV E R S E N D
R e g iste r 2
W rite A d d re ss Po in te r R e g iste r
R e tu rn B u ffe rs to U p p e r L aye r
C o py Pa rt o f TX D a ta Pa cke t
S e t "R e a d y fo r Pa cke t" Fla g
W rite A llo ca te d Pa cke t in to
W rite S o u rce A d d re ss in to
C o py R e m a in in g T X D a ta
Figure 10.5 Drive Send and Allocate Routines
R e a d A llo ca tio n R e su lt
Pa cke t # R e g iste r
E n q u e u e Pa cke t
P ro p e r L o ca tio n
Pa cke t in to R A M
in to R A M
R e g iste r
DATASHEET
Ye s
R e a d In te rru p t S ta tu s R e g iste r
92
Issu e "A llo ca te M e m o ry"
C o m m a n d to M M U
A L L O C ATE
A llo ca tio n
Pa sse d ?
Re tu rn
10/100 Non-PCI Ethernet Single Chip MAC + PHY
C le a r "R e a d y fo r Pa cke t" Fla g
N o
E n a ble A llo ca tio n In te rru p t
S to re D a ta B u ffe r Po in te r
SMSC LAN91C111 REV C
Datasheet