LAN91C111I-NS SMSC, LAN91C111I-NS Datasheet - Page 33

IC ETHERNET CTLR MAC PHY 128-QFP

LAN91C111I-NS

Manufacturer Part Number
LAN91C111I-NS
Description
IC ETHERNET CTLR MAC PHY 128-QFP
Manufacturer
SMSC
Type
Single Chip MAC and PHYr
Datasheet

Specifications of LAN91C111I-NS

Controller Type
Ethernet Controller, MAC/PHY
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-QFP
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
IEEE 802.3 or IEEE 802.3u
Data Rate
10 Mbps or 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
0 V
Supply Current (max)
140 mA
Maximum Operating Temperature
+ 85 C
Ethernet Connection Type
100BASE-T or 100BASE-T4 or 100BASE-TX or 10BASE-T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1014

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10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
SMSC LAN91C111 REV C
7.7.8
STP (150 Ohm) Cable Mode
The transmitter can be configured to drive 150 Ohm shielded twisted pair cable. The STP mode can
be selected by appropriately setting the cable type select bit in the PHY MI serial port Configuration 1
register. When STP mode is enabled, the output current is automatically adjusted to comply with IEEE
802.3 levels.
Transmit Disable
The TP transmitter can be disabled by setting the transmit disable bit in the PHY Ml serial port
Configuration 1 register. When the transmit disable bit is set, the TP transmitter is forced into the idle
state, no data is transmitted, no link pulses are transmitted, and internal loopback is disabled.
Transmit Powerdown
The TP transmitter can be powered down by setting the transmit powerdown bit in the PHY Ml serial
port Configuration 1 register. When the transmit powerdown bit is set, the TP transmitter is powered
down, the TP transmit outputs are high impedance, and the rest of the LAN91C111 operates normally.
Twisted Pair Receiver
Receiver - 100 Mbps
The TX receiver detects input signals from the twisted pair input and converts it to a digital data bit
stream ready for dock and data recovery. The receiver can reliably detect data from a 100BASE-TX
transmitter that has been passed through 0-100 meters of 100-Ohm category 5 UTP or 150 Ohm STP.
The TX receiver consists of an adaptive equalizer, baseline wander correction circuit, comparators, and
MLT-3 decoder. The TP inputs first go to an adaptive equalizer. The adaptive equalizer compensates
for the low pass characteristic of the cable, and it has the ability to adapt and compensate for 0-100
meters of category 5, 100 Ohm UTP or 150 Ohm STP twisted pair cable. The baseline wander
correction circuit restores the DC component of the input waveform that was removed by external
transformers. The comparators convert the equalized signal back to digital levels and are used to
qualify the data with the squelch circuit. The MLT-3 decoder takes the three level MLT-3 digital data
from the comparators and converts it to back to normal digital data to be used for dock and data
recovery.
Receiver - 10 Mbps
The 10 Mbps receiver is able to detect input signals from the twisted pair cable that are within the
template shown in
a low pass filter designed to eliminate any high frequency noise on the input. The output of the receive
filter goes to two different types of comparators, squelch and zero crossing. The squelch comparator
determines whether the signal is valid, and the zero crossing comparator is used to sense the actual
data transitions once the signal is determined to be valid. The output of the squelch comparator goes
to the squelch circuit and is also used for link pulse detection, SOI detection, and reverse polarity
detection; the output of the zero crossing comparator is used for clock and data recovery in the
Manchester decoder.
Figure
7.5. The inputs are biased by internal resistors. The TP inputs pass through
DATASHEET
33
Revision 1.91 (06-01-09)

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