mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 104

• Manufacturer Part Number: mc68hc08ln56
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM)
10.8 I/O Registers
These I/O registers control and monitor operation of the TIM:
10.8.1 TIM Status and Control Register (TSC)
The TIM status and control register:
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
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This read/write flag is set when the TIM counter resets to $0000 after reaching the modulo value
programmed in the TIM counter modulo registers. Clear TOF by reading the TIM status and control
register when TOF is set and then writing a logic zero to TOF. If another TIM overflow occurs before
the clearing sequence is complete, then writing logic zero to TOF has no effect. Therefore, a TOF
interrupt request cannot be lost due to inadvertent clearing of TOF. Reset clears the TOF bit. Writing
a logic one to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
TIM status and control register (TSC)
TIM DMA select register (TDMA)
TIM control registers (TCNTH:TCNTL)
TIM counter modulo registers (TMODH:TMODL)
TIM channel status and control registers (TSC0, TSC1, TSC2, and TSC3)
TIM channel registers (TCH0H:TCH0L, TCH1H:TCH1L, TCH2H:TCH2L, and TCH3H:TCH3L)
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
$0020
TSC
Reset:
Read:
Write:
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
Bit 7
TOF
0
0
Figure 10-3. TIM Status and Control Register (TSC)
= Unimplemented
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
3
0
0
PS2
2
0
PS1
1
0
Freescale Semiconductor
Bit 0
PS0
0