mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 75

• Manufacturer Part Number: mc68hc08ln56
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

A break interrupt during stop mode sets the SIM break stop/wait bit (SBSW) in the SIM break status
register (SBSR).
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
5.7 SIM Registers
The SIM has three memory mapped registers.
Freescale Semiconductor
CGMXCLK
INT/BREAK
IAB
To minimize stop current, all pins configured as inputs shown be driven to
a logic 1 or logic 0.
NOTE: Previous data can be operand data or the STOP opcode, depending
CPUSTOP
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
Address
R/W
$FE00
$FE01
$FE03
IDB
IAB
on the last instruction.
Figure 5-19. Stop Mode Recovery from Interrupt or Break
STOP ADDR
STOP +1
Figure 5-18. Stop Mode Entry Timing
PREVIOUS DATA
Table 5-4. SIM Registers
Register
SBFCR
SBSR
SRSR
STOP ADDR + 1
STOP + 2
Table 5-4
STOP RECOVERY PERIOD
NOTE
NEXT OPCODE
Figure 5-18
STOP + 2
shows the mapping of these registers.
SAME
shows stop mode entry timing.
SP
Access Mode
SAME
User
User
User
SP – 1
SAME
SP – 2
SAME
SP – 3
SIM Registers
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