mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 107

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mc68hc08ln56

Manufacturer Part Number
mc68hc08ln56
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
10.8.3 TIM Counter Registers (TCNTH:TCNTL)
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers
10.8.4 TIM Counter Modulo Registers (TMODH:TMODL)
The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow interrupts
until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
Freescale Semiconductor
TMODH
TMODL
TCNTH
TCNTL
$0022
$0023
$0024
$0025
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset the TIM counter before writing to the TIM counter modulo registers.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Write:
Write:
Read:
Read:
Write:
Write:
Figure 10-6. TIM Counter Modulo Registers (TMODH:TMODL)
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Figure 10-5. TIM Counter Registers (TCNTH:TCNTL)
0
0
1
1
= Unimplemented
14
14
6
0
6
6
0
6
1
6
6
1
13
13
5
0
5
5
0
5
1
5
5
1
NOTE
NOTE
12
12
4
0
4
4
0
4
1
4
4
1
11
11
3
0
3
3
0
3
1
3
3
1
10
10
2
0
2
2
0
2
1
2
2
1
1
9
0
1
1
0
9
1
1
1
1
1
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
0
0
1
1
I/O Registers
107

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