mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 178

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mc68hc08ln56

Manufacturer Part Number
mc68hc08ln56
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
I/O Ports
DDRF[3:0] — Data Direction Register F Bits
Figure 13-18
When bit DDRFx is a logic one, reading address $0009 reads the PTFx data latch. When bit DDRFx is a
logic zero, reading address $0009 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
178
These read/write bits control port F data direction. Reset clears DDRF[3:0], configuring all port F pins
as inputs.
1 = Corresponding port F pin configured as output
0 = Corresponding port F pin configured as input
shows the port F I/O logic.
Avoid glitches on port F pins by writing to the port F data register before
changing data direction register F bits from 0 to 1.
DDRF Bit
NOTES:
1.X = don’t care
2.Hi-Z = high impedance
3.Writing affects data register, but does not affect input
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
0
1
READ DDRF ($000D)
WRITE DDRF ($000D)
WRITE PTF ($0009)
READ PTF ($0009)
PTF Bit
X
X
(1)
Table 13-7. Port F Pin Functions
RESET
Figure 13-18. Port F I/O Circuit
I/O Pin Mode
Input, Hi-Z
Output
(2)
Table 13-7
NOTE
DDRFx
Accesses to DDRF
PTFx
Read/Write
DDRF[3:0]
DDRF[3:0]
summarizes the operation of the port F pins.
PTF[3:0]
Read
Accesses to PTF
Pin
PTF[3:0]
PTF[3:0]
Write
Freescale Semiconductor
(3)
PTFx

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