mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 68

• Manufacturer Part Number: mc68hc08ln56
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

System Integration Module (SIM)
5.5.1 Interrupts
At the beginning of an interrupt, the CPU saves the CPU register contents on the stack and sets the
interrupt mask (I bit) to prevent additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal processing can resume.
shows interrupt entry timing.
Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared). (See
68
I BIT
I BIT
R/W
R/W
IDB
IDB
IAB
IAB
INTERRUPT
INTERRUPT
MODULE
MODULE
DUMMY
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
DUMMY
SP – 4
SP
PC – 1[7:0]
Figure 5-9
CCR
SP – 1
SP – 3
Figure 5-9. Interrupt Recovery
PC – 1[15:8]
Figure 5-8
A
shows interrupt recovery timing.
SP – 2
SP – 2
X
X
.
Figure
SP – 3
SP – 1
Interrupt Entry
PC – 1 [7:0]
A
5-10.)
SP – 4
SP
PC – 1 [15:8]
CCR
VECT H
PC
V DATA H
OPCODE
VECT L
PC + 1
OPERAND
V DATA L
START ADDR
Freescale Semiconductor
OPCODE
Figure 5-8