mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 51

• Manufacturer Part Number: mc68hc08ln56
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

VPR[1:0] — VCO Power-of-Two Range Select Bits
4.5.2 PLL Bandwidth Control Register
The PLL bandwidth control register:
AUTO — Automatic Bandwidth Control Bit
LOCK — Lock Indicator Bit
Freescale Semiconductor
These read/write bits control the VCO’s hardware power-of-two range multiplier E that, in conjunction
with L (See
Register.) controls the hardware center-of-range frequency, f
the PLLON bit is set. Reset clears these bits.
•
•
•
•
This read/write bit selects automatic or manual bandwidth control. When initializing the PLL for manual
operation (AUTO = 0), clear the ACQ bit before turning on the PLL. Reset clears the AUTO bit.
When the AUTO bit is set, LOCK is a read-only bit that becomes set when the VCO clock, CGMVCLK,
is locked (running at the programmed frequency). When the AUTO bit is clear, LOCK reads as logic
zero and has no meaning. The write one function of this bit is reserved for test, so this bit must always
be written a zero. Reset clears the LOCK bit.
1 = Automatic bandwidth control
0 = Manual bandwidth control
1 = VCO frequency correct or locked
0 = VCO frequency incorrect or unlocked
Selects automatic or manual (software-controlled) bandwidth control mode
Indicates when the PLL is locked
In automatic bandwidth control mode, indicates when the PLL is in acquisition or tracking mode
In manual operation, forces the PLL into acquisition or tracking mode
PBWC
$004B
4.3.3 PLL
Reset:
Read:
Write:
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
AUTO
Bit 7
Figure 4-5. PLL Bandwidth Control Register (PBWC)
0
VPR1:VPR0
Circuits,
00
01
10
11
= Unimplemented
LOCK
Table 4-3. VPR1:VPR0 Programming
6
0
4.3.6 Programming the PLL
ACQ
5
0
E
0
1
2
3
4
0
0
VCO Power-of-Two
Range Multiplier
R
3
0
0
and
VRS
= Reserved
. VPR1:VPR0 cannot be written when
1
2
4
8
4.5.5 PLL VCO Range Select
2
0
0
1
0
0
Bit 0
R
0
CGMB Registers
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