mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 180

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mc68hc08ln56

Manufacturer Part Number
mc68hc08ln56
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Analog-to-Digital Converter (ADC)
14.3.2 Voltage Conversion
When the input voltage to the ADC equals V
voltage equals AV
linear conversion. All other input voltages will result in $FF, if greater than V
14.3.3 Conversion Time
Conversion starts after a write to the ADSCR. Conversion time in terms of the number of bus cycles is a
function of oscillator frequency, bus frequency, and ADIV prescaler bits. For example, with an oscillator
frequency of 4 MHz, bus frequency of 8 MHz and ADC clock frequency of 1 MHz, one conversion will take
between 16 ADC and 17 ADC clock cycles or between 16 and 17 µs. There will be 128 bus cycles
between each conversion. Sample rate is approximately 60 kHz.
180
DATA BUS
Number of Bus Cycles = Conversion Time x Bus Frequency
INTERNAL
Input voltage should not exceed the analog supply voltages.
AIEN
INTERRUPT
SS
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
LOGIC
,
the ADC converts it to $00. Input voltages between V
READ DDRB/DDRB
WRITE DDRB/DDRD
WRITE PTB
READ PTB
COCO/IDMAS
Conversion Time =
BUS CLOCK
CONVERSION
COMPLETE
CGMXCLK
RESET
Figure 14-1. ADC Block Diagram
ADIV[2:0]
ADC DATA REGISTER
GENERATOR
RH
CLOCK
ADC
, the ADC converts the signal to $FF (full scale). If the input
DDRBx
PTBx
ADC CLOCK
ADICLK
NOTE
16-17 ADC cycles
ADC frequency
ADC VOLTAGE IN
(ADVIN)
DISABLE
DISABLE
CHANNEL
RH
SELECT
RH
and AV
(ADC CHANNEL X)
.
PTB/Dx
ADCH[4:0]
Freescale Semiconductor
SS
are a straight-line

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