mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 172

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mc68hc08ln56

Manufacturer Part Number
mc68hc08ln56
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
I/O Ports
DDRC[6:0] — Data Direction Register C Bits
Figure 13-10
When bit DDRCx is a logic one, reading address $0002 reads the PTCx data latch. When bit DDRCx is
a logic zero, reading address $0002 reads the voltage level on the pin. The data latch can always be
written, regardless of the state of its data direction bit.
pins.
172
These read/write bits control port C data direction. Reset clears DDRC[6:0], configuring all port C pins
as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
shows the port C I/O logic.
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
DDRC Bit
NOTES:
1.X = don’t care
2.Hi-Z = high impedance
3.Writing affects data register, but does not affect input
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
0
1
READ DDRC ($0006)
WRITE DDRC ($0006)
WRITE PTC ($0002)
READ PTC ($0002)
PTC Bit
X
X
(1)
Table 13-4. Port C Pin Functions
Figure 13-10. Port C I/O Circuit
RESET
I/O Pin Mode
Input, Hi-Z
Output
(2)
NOTE
Accesses to DDRC
DDRCx
PTCx
Read/Write
Table 13-4
DDRC[6:0]
DDRC[6:0]
summarizes the operation of the port C
PTC[6:0]
Read
Accesses to PTC
Pin
PTC[6:0]
PTC[6:0]
Write
Freescale Semiconductor
(3)
PTCx

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