mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 126

• Manufacturer Part Number: mc68hc08ln56
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Serial Peripheral Interface Module (SPI)
The following sources in the SPI status and control register can generate CPU interrupt requests or DMA
service requests:
11.9 Resetting the SPI
Any system reset completely resets the SPI. Partial resets occur whenever the SPI enable bit (SPE) is
low. Whenever SPE is low, the following occurs:
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SPI receiver full bit (SPRF) — The SPRF bit becomes set every time a byte transfers from the shift
register to the receive data register. If the SPI receiver interrupt enable bit, SPRIE, is also set,
SPRF can generate either an SPI receiver/error CPU interrupt request or an SPRF DMA service
request.
If the DMA select bit, DMAS, is clear, SPRF generates an SPRF CPU interrupt request. If DMAS
is set, SPRF generates an SPRF DMA service request.
SPI transmitter empty (SPTE) — The SPTE bit becomes set every time a byte transfers from the
transmit data register to the shift register. If the SPI transmit interrupt enable bit, SPTIE, is also set,
SPTE can generate either an SPTE CPU interrupt request or an SPTE DMA service request.
If the DMAS bit is clear, SPTE generates an SPTE CPU interrupt request. If DMAS is set, SPTE
generates an SPTE DMA service request.
The SPTE flag is set
Any transmission currently in progress is aborted
The shift register is cleared
The SPI state counter is cleared, making it ready for a new complete transmission
All the SPI port logic is defaulted back to being general purpose I/O.
DMAS
ERRIE
MODF
OVRF
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
Figure 11-12. SPI Interrupt Request Generation
SPRIE
SPTE
SPTIE
SPRF
SPE
SPI TRANSMITTER
DMA SERVICE REQUEST
SPI TRANSMITTER
CPU INTERRUPT REQUEST
SPI RECEIVER
DMA SERVICE REQUEST
SPI RECEIVER/ERROR
CPU INTERRUPT REQUEST
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