mc68hc08ln56 Freescale Semiconductor, Inc, mc68hc08ln56 Datasheet - Page 209

• Manufacturer Part Number: mc68hc08ln56
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

COP Control Register (COPCTL)
16.4 COP Control Register (COPCTL)
The COP control register is located at address $FFFF and overlaps the reset vector. Writing any value to
$FFFF clears the COP counter and starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
COPCTL
Bit 7
6
5
4
3
2
1
Bit 0
$FFFF
Read:
Low Byte of Reset Vector
Write:
Clear COP Counter
Reset:
Unaffected by Reset
Figure 16-2. COP Control Register (COPCTL)
16.5 Interrupts
The COP does not generate CPU interrupt requests or DMA service requests.
16.6 Monitor Mode
The COP is disabled in monitor mode when V
+ V
is present on the IRQ1/V
pin or on the RST pin.
PP
DD
HI
16.7 Low-Power Modes
The WAIT and STOP instructions put the MCU in low-power- consumption standby modes.
16.7.1 Wait Mode
The COP continues to operate during wait mode. To prevent a COP reset during wait mode, periodically
clear the COP counter in a CPU interrupt routine or a DMA service routine.
16.7.2 Stop Mode
Stop mode turns off the CGMXCLK input to the COP and clears the SIM counter. Service the COP
immediately before entering or after exiting stop mode to ensure a full COP timeout period after entering
or exiting stop mode.
16.8 COP Module During Break Interrupts
The COP is disabled during a break interrupt when V
+ V
is present on the RST pin.
DD
HI
MC68HC08LN56 • MC68HC708LN56 General Release Specification, Rev. 2.1
Freescale Semiconductor
209