l-fw32206t100 ETC-unknow, l-fw32206t100 Datasheet - Page 12

• Manufacturer Part Number: l-fw32206t100
• Description: 1394a Phy/link Open Host Controller
• Manufacturer: ETC-unknow

1394a PCI PHY/Link Open Host Controller
FW322 Functional Description
It is the responsibility of the link to ascertain if a
received packet is to be forwarded to the OHCI for
processing. If so, the packet is directed to a proper
inbound FIFO for either the isochronous block or the
asynchronous block to process. The link is also
responsible for CRC generation on outgoing packets
and CRC checking on received packets.
12
12
* Internal points, unaccessible via external package pins.
CONTENDER*
SYSCLK*
RESETN
LREQ*
LKON*
CTL0*
CTL1*
PC0*
PC1*
LPS*
PC2
CPS
D0*
D1*
D2*
D3*
D4*
D5*
D6*
D7*
SM
SE
INTERFACE
LINK
I/O
Figure 5. The PHY Core Block Diagram
(continued)
ARBITRATION
RECEIVED
DECODER/
TRANSMIT
ENCODER
RETIMER
CONTROL
MACHINE
DATA
STATE
DATA
LOGIC
AND
To become aware of data to be sent outbound on the
1394 bus, the link must monitor the OHCI FIFOs look-
ing for packets in need of transmission. Based on data
received from the OHCI block, the link will form packet
headers for the 1394 bus. The link will alert the PHY
core regarding the availability of the outbound data. It is
the link’s function to generate CRC for the outbound
data. The link also provides PHY core register access
for the OHCI.
CABLE PORT 0
CABLE PORT 1
OSCILLATOR,
GENERATOR
PLL SYSTEM,
GENERATOR
CURRENT
VOLTAGE
CRYSTAL
CLOCK
BIAS
AND
AND
December 2005
Agere Systems Inc.
R0
R1
TPA0+
TPA0–
TPBIAS0
TPB0+
TPB0–
TPA1+
TPA1–
TPBIAS1
TPB1+
TPB1–
XI
XO
5-5459.i(F) R.01