l-fw32206t100 ETC-unknow, l-fw32206t100 Datasheet - Page 5

• Manufacturer Part Number: l-fw32206t100
• Description: 1394a Phy/link Open Host Controller
• Manufacturer: ETC-unknow

Data Sheet, Rev. 1
FW322 06 T100
December 2005
1394a PCI PHY/Link Open Host Controller
Table of Contents
(continued)
Table
Page
Table 36. SelfID Count Register Description ......................................................................................................... 46
Table 37. Isochronous Receive Channel Mask High Register Description ........................................................... 47
Table 38. Isochronous Receive Channel Mask Low Register Description ............................................................ 47
Table 39. Interrupt Event Register Description ...................................................................................................... 48
Table 40. Interrupt Mask Register Description ...................................................................................................... 50
Table 41. Isochronous Transmit Interrupt Event Register Description .................................................................. 52
Table 42. Isochronous Transmit Interrupt Event Description ................................................................................ 53
Table 43. Isochronous Receive Interrupt Event Description ................................................................................. 54
Table 44. Fairness Control Register Description ................................................................................................... 55
Table 45. Link Control Register Description ......................................................................................................... 56
Table 46. Node Identification Register Description ............................................................................................... 57
Table 47. PHY Core Layer Control Register Description ...................................................................................... 58
Table 48. Isochronous Cycle Timer Register Description ..................................................................................... 58
Table 49. Asynchronous Request Filter High Register Description ....................................................................... 59
Table 50. Asynchronous Request Filter Low Register Description ....................................................................... 59
Table 51. Physical Request Filter High Register Description ................................................................................ 60
Table 52. Physical Request Filter Low Register Description ................................................................................. 60
Table 53. Asynchronous Context Control Register Description ........................................................................... 61
Table 54. Asynchronous Context Command Pointer Register Description ........................................................... 62
Table 55. Isochronous Transmit Context Control Register Description ................................................................ 63
Table 56. Isochronous Transmit Context Command Pointer Register Description ............................................... 64
Table 57. Isochronous Receive Context Control Register Description .................................................................. 65
Table 58. Isochronous Receive Context Command Pointer Register Description ................................................ 66
Table 59. Isochronous Receive Context Match Register Description ................................................................... 67
Table 60. FW322 Vendor-Specific Registers Description ..................................................................................... 68
Table 61. Isochronous DMA Control Registers Description .................................................................................. 68
Table 62. Asynchronous DMA Control Registers Description ............................................................................... 69
Table 63. Link Options Register Description ......................................................................................................... 70
Table 64. PHY Core Register Map ........................................................................................................................ 71
Table 65. PHY Core Register Fields ..................................................................................................................... 72
Table 66. PHY Core Register Page 0: Port Status Page ...................................................................................... 74
Table 67. PHY Core Register Port Status Page Fields ........................................................................................ 75
Table 68. PHY Core Register Page 1: Vendor Identification Page ....................................................................... 76
Table 69. PHY Core Register Vendor Identification Page Fields .......................................................................... 76
Table 70. ac Characteristics of Serial EEPROM Interface Signals ....................................................................... 78
Table 71. Absolute Maximum Ratings ................................................................................................................... 81
Table 72. Analog Characteristics ........................................................................................................................... 82
Table 73. Driver Characteristics ............................................................................................................................ 83
Table 74. Device Characteristics ........................................................................................................................... 83
Table 75. Switching Characteristics ...................................................................................................................... 84
Table 76. Clock Characteristics ............................................................................................................................. 84
Agere Systems Inc.
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