l-fw32206t100 ETC-unknow, l-fw32206t100 Datasheet - Page 37

• Manufacturer Part Number: l-fw32206t100
• Description: 1394a Phy/link Open Host Controller
• Manufacturer: ETC-unknow

Data Sheet, Rev. 1
December 2005
Internal Registers
GUID ROM Register
The GUID ROM register is used to access the serial EEPROM, and is only applicable if bit 24 (GUID_ROM) in the
OHCI Version register is set.
Offset:
Default:
Reference:
Table 20. GUID ROM Register Description
Asynchronous Transmit Retries Register
The Asynchronous Transmit Retries register indicates the number of times the FW322 attempts a retry for
asynchronous DMA request transmit and for asynchronous physical and DMA response transmit.
Offset:
Default:
Reference:
Table 21. Asynchronous Transmit Retries Register Description
Agere Systems Inc.
30:26
23:16
31:29
28:16
15:12
15:8
11:8
Bit
7:0
Bit
7:4
3:0
31
25
24
maxPhysRespRetries
maxATRespRetries
maxATReqRetries
00XX 0000h
1394 Open Host Controller Interface Specification, Rev. 1.1, Section 5.3
1394 Open Host Controller Interface Specification, Rev. 1.1, Section 5.4
04h
Field Name
0000 0000h
08h
addrReset
Reserved
Reserved
Reserved
miniROM
Field Name
secondLimit
rdStart
rdData
cycleLimit
Reserved
(continued)
RWU
RWU
Type
RU
R
R
R
R
Type
RW
RW
RW
R
R
R
Software sets this bit to reset the GUID ROM address to 0. When the
FW322 completes the reset, it clears this bit.
Reserved. Bits 30:26 return 0s when read.
A read of the currently addressed byte is started when this bit is set.
This bit is automatically cleared when the FW322 completes the read
of the currently addressed GUID ROM byte.
Reserved. Bit 24 returns 0 when read.
This field represents the data read from the GUID ROM and is only
valid when rdStart = 0.
Reserved. Bits 15:8 return 0s when read.
Indicates the first byte location of the miniROM image in the GUID
ROM. A value of 0 is returned if no miniROM is implemented.
The cycle limit field returns 0s when read, since outbound dual-
The second limit field returns 0s when read, since outbound dual-
phase retry is not implemented.
phase retry is not implemented.
Reserved. Bits 15:12 return 0s when read.
This field tells the physical response unit how many times to
attempt to retry the transmit operation for the response.
This field tells the asynchronous transmit DMA response unit how
many times to attempt to retry the transmit operation for the
response.
This field tells the asynchronous transmit DMA request unit how
many times to attempt to retry the transmit operation for the
response.
1394a PCI PHY/Link Open Host Controller
Description
Description
FW322 06 T100
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