l-fw32206t100 ETC-unknow, l-fw32206t100 Datasheet - Page 30

• Manufacturer Part Number: l-fw32206t100
• Description: 1394a Phy/link Open Host Controller
• Manufacturer: ETC-unknow

FW322 06 T100
1394a PCI PHY/Link Open Host Controller
Internal Registers
Power Management Capabilities Register
The Power Management Capabilities register indicates the capabilities of the FW322 related to PCI power man-
agement. The default value of this register can be selectively programmed by the serial EEPROM. However, the
D3cold and AUX_PWR fields cannot be changed from the default of 0 by the EEPROM.
Offset:
Default:
Type:
Reference:
Table 15. Power Management Capabilities Register Description
30
30
Bit
8:6
2:0
15
14
13
12
10
11
9
5
4
3
PME_D3COLD
D2_SUPPORT
D1_SUPPORT
PM_VERSION
PME_D3HOT
Field Name
46h
7E02h
Read only
PCI Bus Power Management Interface Specification, Rev. 1.1, Section 3.2.3 and 1394 Open Host
Controller Interface Specification, Rev. 1.1, Section A.3.8.3
AUX_PWR
PME_CLK
Reserved
PME_D2
PME_D1
PME_D0
DSI
(continued)
Type
R
R
R
R
R
R
R
R
R
R
R
R
PME Support from D3cold. Set to 0, indicating that the FW322
cannot generate a PME event in D3cold.
PME Support from D3hot. Set to 1, indicating that the FW322 can
generate a PME event in the D3hot state.
PME Support from D2. Set to 1, indicating that the FW322 can
generate a PME in D2.
PME Support from D1. Set to 1, indicating that the FW322 can
generate a PME in D1.
PME Support from D0. Set to 1, indicating that the FW322 can
generate a PME in D0.
D2 Support. This bit returns a 1 when read, indicating that the FW322
supports the D2 power state.
D1 Support. This bit returns a 1 when read, indicating that the FW322
supports the D1 power state.
Auxiliary Power Source. This field reports the Vaux power require-
ments for the Open HCI function. This field is always 0.
Device-Specific Initialization. This bit returns 0 when read, indi-
cating that the FW322 does not require special initialization beyond
the standard PCI configuration header before a generic class driver is
able to use it.
Reserved. Bit returns 0 when read.
PME Clock. This bit returns 0 when read, indicating that no host bus
clock is required for the FW322 to generate PME.
Power Management Version. This field returns 010b when read, indi-
cating that the FW322 is compatible with the registers described in the
PCI Power Management Interface Specification, Rev.1.1.
Description
Data Sheet, Rev. 1
December 2005
Agere Systems Inc.