l-fw32206t100 ETC-unknow, l-fw32206t100 Datasheet - Page 66

• Manufacturer Part Number: l-fw32206t100
• Description: 1394a Phy/link Open Host Controller
• Manufacturer: ETC-unknow

FW322 06 T100
1394a PCI PHY/Link Open Host Controller
Internal Registers
Table 57. Isochronous Receive Context Control Register Description (continued)
Isochronous Receive Context Command Pointer Register
The Isochronous Receive Context Command Pointer register contains a pointer to the address of the first
descriptor block that the FW322 accesses when software enables an isochronous receive context by setting the
Isochronous Receive Context Control register bit 15 (run). The n value in the following register addresses
indicates the context number (n = 0:7).
Offset:
Default:
Reference:
Table 58. Isochronous Receive Context Command Pointer Register Description
66
66
14:13
31:4
Bit
9:8
7:5
4:0
Bit
3:0
15
12
10
11
descriptorAddress
Field Name
Field Name
event code
Reserved
Reserved
40Ch + (32 * n)
XXXX XXXXh
1394 Open Host Controller Specification, Rev. 1.1, Sections 10.3, 3.1.2
active
wake
dead
spd
run
Z
(continued)
RSCU
Type
RWU
RWU
RSU
Type
RU
RU
RU
RU
R
R
and cleared by software to stop descriptor processing. The FW322
changes this bit only on a hardware or software reset.
Reserved. Bits 14:13 return 0s when read.
Software sets this bit to cause the FW322 to continue or resume descrip-
tor processing. The FW322 clears this bit on every descriptor fetch.
The FW322 sets this bit when it encounters a fatal error and clears the
bit when software resets bit 15 (run).
The FW322 sets this bit to 1 when it is processing descriptors.
Reserved. Bits 9:8 return 0s when read.
This field indicates the speed at which the packet was received.
000 = 100 Mbits/s.
001 = 200 Mbits/s.
010 = 400 Mbits/s.
All other values are reserved.
Following an INPUT_* command, the error or status code is indicated in
this field (see OHCI v.1.1, 10.3.2 and Table 3-2).
This bit is set by software to enable descriptor processing for the context
Address of the context program which will be executed when a DMA
context is started.
Indicates how many physically contiguous descriptors are pointed to by
descriptor address. In buffer full mode, Z will be either one or zero. In
packet-per-buffer mode, Z will be from zero to eight.
Description
Description
Data Sheet, Rev. 1
December 2005
Agere Systems Inc.