l-fw32206t100 ETC-unknow, l-fw32206t100 Datasheet - Page 64

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l-fw32206t100

Manufacturer Part Number
l-fw32206t100
Description
1394a Phy/link Open Host Controller
Manufacturer
ETC-unknow
Datasheet
FW322 06 T100
1394a PCI PHY/Link Open Host Controller
Internal Registers
Isochronous Transmit Context Command Pointer Register
The Isochronous Transmit Context Command Pointer register contains a pointer to the address of the first descrip-
tor block that the FW322 accesses when software enables an isochronous transmit context by setting the Isochro-
nous Transmit Context Control register bit 15 (run). The n value in the following register addresses indicates the
context number (n = 0:7).
Offset:
Default:
Reference:
Table 56. Isochronous Transmit Context Command Pointer Register Description
64
64
31:4
Bit
3:0
descriptorAddress
Field Name
20Ch + (16 * n)
XXXX XXXXh
1394 Open Host Controller Specification, Rev. 1.1, Sections 9.2.1, 3.1.2
Z
(continued)
RWU
RWU
Type
Address of the context program, which will be executed when a DMA
context is started. All descriptors are 16-byte aligned, so the four least
significant bits of any descriptor address must be zero.
Indicates how many physically contiguous descriptors are pointed to by
descriptorAddress.
Description
Data Sheet, Rev. 1
December 2005
Agere Systems Inc.

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