DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 200

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 7 I/O Ports
7.2
This section describes the output priority of each pin.
The name of each peripheral module pin is followed by “_OE”. This (for example: TIOCA4_OE)
indicates whether the output of the corresponding function is valid (1) or if another setting is
specified (0). Table 7.4 lists each port output signal's valid setting. For details on the
corresponding output signals, see the register description of each peripheral module.
7.2.1
(1)
The pin function is switched as shown below according to the P1nDDR bit setting.
7.2.2
(1)
The pin function is switched as shown below according to the P2nDDR bit setting.
Rev. 3.00 Sep. 28, 2009 Page 154 of 910
REJ09B0350-0300
Module Name
I/O port
Module Name
I/O port
P17 to P10
P27 to P20
Output Buffer Control
Port 1
Port 2
Pin Function
P1n output
P1n input
(initial setting)
Pin Function
P2n output
P2n input
(initial setting)
Setting
I/O Port
P1nDDR
1
0
Setting
I/O Port
P2nDDR
1
0
(n = 7 to 0)
(n = 7 to 0)

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