DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 359

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
11.3.7
TCMCR is an 8-bit readable/writable register. TCMCR selects input capture input edge, counter
start, and counter clock, and controls operation mode.
Bit
7
6
5
Bit Name
CST
POCTL
CPSPE
TCM Control Register (TCMCR)
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Counter Start
In timer mode, setting this bit to 1 starts counting by
TCMCNT; clearing this bit stops counting by TCMCNT.
Then, the counter is initialized to H'0000, and input-capture
operation stops.
Clear this bit and thus return TCMCNT to H'0000 in
initialization for cycle measurement mode.
TCMCYI Input Polarity Reversal
0: Use the TCMCYI input directly
1: Use the inverted TCMCYI input
Note: Modify this bit while CST = 0 and TCMMDS = 0
Input Capture Stop Enable
Controls whether or not counting up by TCMCNT and input-
capture operation stop or continue when either of MAXOVF
or MINUDF is set to 1 in cycle measurement mode. The bit
does not affect operation in timer mode.
0: Counting up and input-capture operation continue when
1: Counting up and input-capture operation are disabled
the flag is set to 1.
when the flag is set to 1.
Section 11 16-Bit Cycle Measurement Timer (TCM)
Rev. 3.00 Sep. 28, 2009 Page 313 of 910
REJ09B0350-0300

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