DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 651

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.3.4
HICR5 enables or disables the operation of the SCIF interface, and controls OBEI interrupts.
Bit
7
6
5 to 4 ⎯
3
2 to 0 ⎯
Bit Name
OBEIE
OBEI
SCIFE
Host Interface Control Register 5 (HICR5)
Initial
Value
0
0
All 0
0
All 0
Slave Host Description
R/W
R/W
R/W
R/W
R/W
R/W
⎯
⎯
⎯
⎯
⎯
Output Buffer Empty Interrupt Enable
Enables or disables OBEI interrupts (for this LSI).
0: Output buffer empty interrupt request is disabled
1: Output buffer empty interrupt request is enabled
Output Buffer Empty Interrupt Flag
0: [Clearing conditions]
•
•
1: [Setting condition]
When one of OBF1, OBF2, OBF3A, OBF3B, and
OBF4 is cleared
Reserved
The initial value bit should not be changed.
SCIF Enable
Enables or disables access from the LPC host of
the SCIF.
0: Disables access from the LPC host of the SCIF
1: Enables access from the LPC host of the SCIF
Reserved
The initial value should not be changed.
Writing 0 after reading OBEI = 1
LPC hardware reset or LPC software reset
Rev. 3.00 Sep. 28, 2009 Page 605 of 910
Section 19 LPC Interface (LPC)
REJ09B0350-0300