DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 206

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 7 I/O Ports
(2)
The pin function is switched as shown below according to the SCIFOE1 bit in SCIFCR of the
SCIF and the SCIFE bit in HICR5 of the SCIF, and the P51DDR bit.
SCIFENABLE = 1: SCIFOE1 + SCIFE
Module
Name
SCIF
I/O port
(3)
The pin function is switched as shown below according to the SCIFOE1 bit in SCIFCR of the
SCIF, the SCIFE bit in HICR5, and the P50DDR bit.
SCIFENABLE = 1: SCIFOE1 + SCIFE
Module
Name
SCIF
I/O port
Rev. 3.00 Sep. 28, 2009 Page 160 of 910
REJ09B0350-0300
P51/FRxD
P50/FTxD
Pin Function
FTxD output
P50 output
P50 input
(initial setting)
Pin Function
FRxD input
P51 output
P51 input
(initial setting)
Logical Expression
SCIFENABLE
1
0
0
Logical Expression
SCIFENABLE
1
0
0
Setting
Setting
I/O Port
P50DDR
1
0
I/O Port
P51DDR
1
0

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