DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 345

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.8.5
If a compare match occurs in the T
and the compare match signal is inhibited. A compare match does not occur even if the same value
as before is written. Figure 10.46 shows the timing in this case.
10.8.6
If a compare match occurs in the T
buffer operation will be the data prior to the write. Figure 10.47 shows the timing in this case.
Conflict between TGR Write and Compare Match
Conflict between Buffer Register Write and Compare Match
φ
Address
Write signal
Compare
match signal
TCNT
TGR
Figure 10.46 Conflict between TGR Write and Compare Match
2
2
state of a TGR write cycle, the data transferred to TGR by the
state of a TGR write cycle, the TGR write takes precedence
TGR write data
N
N
TGR write cycle
TGR address
T1
T2
N+1
Rev. 3.00 Sep. 28, 2009 Page 299 of 910
Section 10 16-Bit Timer Pulse Unit (TPU)
M
Prohibited
REJ09B0350-0300