DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 26

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Rev. 3.00 Sep. 28, 2009 Page xxiv of xliv
REJ09B0350-0300
Item
22.12 Standard Serial
Communication Interface
Specifications for Boot Mode
(8) Programming/Erasing State
(f) Memory Read
22.13 Usage Notes
25.1 Register Addresses
(Address Order)
Page Revision (See Manual for Details)
752
757
788
• Area (1 byte)
Description amended
5. Do not power off the Vcc power supply (including
Description amended
7. At powering on the Vcc power supply, fix the RES
Table amended
Register Name
A/D data register A
A/D data register B
A/D data register C
A/D data register D
A/D data register E
A/D data register F
A/D data register G
A/D data register H
H'00: User boot MAT
H'01: User MAT
the removal of the chip from the PROM
programmer) during programming/erasing in which
a high voltage is applied to the flash memory. Doing
so may damage the flash memory permanently. If a
reset is input, the reset must be released after the
reset input period of at least 100μs.
pin to low and set the flash memory to hardware
protection state. This power on timing must also be
satisfied at a power-off and power-on caused by a
power failure and other factors.
An address error occurs when the area
setting is incorrect.
Abbreviation
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
Number
of bits
16
16
16
16
16
16
16
16
Address
H'FC00
H'FC02
H'FC04
H'FC06
H'FC08
H'FC0A
H'FC0C
H'FC0E
Module
A/D
converter
A/D
converter
A/D
converter
A/D
converter
A/D
converter
A/D
converter
A/D
converter
A/D
converter
Data
Width
16
16
16
16
16
16
16
16
Access
States
2
2
2
2
2
2
2
2

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