DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 805

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI incorporates a clock pulse generator which generates the system clock (φ), internal clock,
bus master clock, and subclock (φSUB). The clock pulse generator consists of an oscillator, duty
correction circuit, system clock select circuit, subclock input circuit, and subclock waveform
forming circuit. Figure 23.1 shows a block diagram of the clock pulse generator.
The subclock input is controlled by software according to the EXCLE bit and the EXCLS bit in
the port control register (PTCNT0) settings in the low power control register (LPWRCR). For
details on LPWRCR, see section 24.1.2, Low-Power Control Register (LPWRCR). For details on
PTCNT0, see section 7.3.1, Port Control Register 0 (PTCNT0).
EXCL
(ExEXCL)
EXTAL
XTAL
Subclock
input circuit
Oscillator
Figure 23.1 Block Diagram of Clock Pulse Generator
Section 23 Clock Pulse Generator
Subclock
waveform
forming circuit
Duty
correction
circuit
WDT_1
count clock
φSUB
φ
System
clock
select
circuit
φ
System clock
to φ pin
Rev. 3.00 Sep. 28, 2009 Page 759 of 910
Section 23 Clock Pulse Generator
Internal clock
to on-chip
peripheral modules
REJ09B0350-0300
Bus master
clock to CPU