DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 766

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 Flash Memory
In consideration of these conditions, the areas in which the program data can be stored and
executed are determined by the combination of the processing contents, operating mode, and bank
structure of the memory MATs, as shown in tables 22.9 to 22.13.
Table 22.9 Executable Memory MAT
Note
Table 22.10 Usable Area for Programming in User Program Mode
Note:
Rev. 3.00 Sep. 28, 2009 Page 720 of 910
REJ09B0350-0300
Processing Contents
Programming
Erasing
Item
Storage area for program data
Operation for selecting on-chip
program to be downloaded
Operation for writing H'A5 to FKEY
Execution of writing 1 to SCO bit in
FCCS (download)
Operation for clearing FKEY
Decision of download result
Operation for download error
Operation for setting initialization
parameter
Execution of initialization
Decision of initialization result
Operation for initialization error
Operation for disabling interrupts
Operation for writing H'5A to FKEY
Operation for setting programming
parameter
Execution of programming
Decision of programming result
Operation for programming error
Operation for clearing FKEY
* Programming/Erasing is possible to the User Mat.
* Transferring the program data to the on-chip RAM beforehand enables this area to be
used.
User Program Mode
See table 22.10.
See table 22.11.
Storable/Executable Area
On-Chip RAM
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
×*
O
O
×
O
O
O
O
×
O
O
O
O
×
×
×
×
×
User MAT
Operating Mode
User boot Mode*
See table 22.12
See table 22.13
Selected MAT
User MAT
⎯
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Embedded
Program
Storage MAT
⎯
O