M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 107

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
e
E
3
. v
J
2
Figure 9.3 CM1 Register
0
C
1
9
0 .
8 /
B
0
3
5
0
3
G
J
7
u
o r
0 -
. l
System Clock Control Register 1
u
b7
0
1
NOTES:
p
, 1
0
3
b6
0
(
1. Rewrite the CM1 register after the PRC0 bit in the PRCR register is set to "1" (write enable).
2. When the CM10 bit is set to "1", the clock applied to X
3. When the CM10 bit is set to "1", the MCD4 to MCD0 bits in the MCD register are set to "01000
4. The CM17 bit is valid only when the CM21 bit in the CM2 register is set to "0". Use the procedure
5. If the PM21 bit in the PM2 register is set to "1" (clock change disable), the CM10 and CM17 bits do
2
M
0
resistor is disabled. X
(divide-by-8 mode). When the CM20 bit is set to "1" (oscillation stop detect function enabled) or the
CM21 bit to "1" (on-chip oscillator selected), do not set the CM10 bit to "1".
shown in Figure 9.12 to set the CM17 bit to "1".
not change when written.
source), the CM10 bit setting does not change when written.
If the PM22 bit in the PM2 register is set to "1" (on-chip oscillator clock as watchdog timer count
3
b5
0
1
2
5
C
b4
0
8 /
Page 82
b3
, 5
0
M
b2
0
3
b1
0
2
C
f o
b0
8 /
4
5
IN
9
(b4 - b1)
) T
Symbol
, X
4
CM10
CM17
(b5)
(b6)
Bit
CIN
Symbol
CM1
and X
All Clock Stop Control
Bit
Reserved Bit
Reserved Bit
Reserved Bit
CPU Clock Select
Bit 1
(2, 5)
COUT
(4,5)
Bit Name
are placed in high-impedance states.
(1)
Address
0007
16
OUT
becomes "H" and the built-in feedback
0 : Clock oscillates
1 : All clocks stop (stop mode)
Set to "0"
Set to "1"
Set to "0"
0 : Main clock
1 : PLL clock
After Reset
0010 0000
Function
2
9. Clock Generation Circuit
(3)
2
"
RW
RW
RW
RW
RW
RW