M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 347

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
23.1 CAN-Associated Registers
e
E
3
. v
J
2
Figure 23.3 C0CTLR0 and C1CTLR0 Registers
0
C
Figures 23.3 to 23.18, and Figures 23.20 to 23.33 show registers associated with CAN. To access the
CAN-associated registers, set the CM21 bit in the CM2 register to "0" (main clock or PLL clock as CPU
clock) and the MCD4 to MCD0 bits in the MCD register to "10010
in the PM2 register to "1" (main clock direct mode) and the PM25 bit in the PM2 regiseter to "1" (CAN clock).
Two wait states are added into the bus cycle.
Refer to 7. Processor Mode and 9. Clock Generation Circuit.
23.1.1 CANi Control Register 0 (CiCTLR0 Register) (i=0, 1)
1
9
8 /
0 .
B
0
3
5
0
G
3
J
7
u
o r
b15
0 -
. l
CANi Control Register 0
u
NOTES:
0
1
p
, 1
0
1. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after
2. Set the RESET1 and RESET0 bits to the same value simultaneously.
3. These bits can only be set to "1", not "0", by program.
3
(
2
M
reset and supplying the clock to the CAN module.
0
3
0
2
5
C
b8
8 /
Page 322
b7
, 5
0
M
3
2
C
f o
8 /
b0
4
5
BASICCAN
LOOPBACK
(b15 - b12)
TSRESET
ECRESET
9
) T
Symbol
RESET0
RESET1
(b7 - b6)
TSPRE0
TSPRE1
4
(b5)
Bit
(b2)
Symbol
C0CTLR0
C1CTLR0
(i=0, 1)
CAN Reset Bit 0
Loop Back Mode
Select Bit
BasicCAN Mode
Select Bit
CAN Reset Bit 1
Reserved Bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Time Stamp
Prescaler Select Bit
Time Stamp
Counter Reset Bit
Error Counter
Reset Bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Name
Address
0201
0281
16
16
- 0200
- 0280
0: CAN module reset exited
1: CAN module is reset
0: Disables loop back function
1: Enables loop back function
0: Disables BasicCAN mode function
1: Enables BasicCAN mode function
0: CAN module reset exited
1: CAN module is reset
Set to "0"
b9 b8
0 0: Selects the CAN bus bit clock
0 1: Selects the CAN bus bit clock divided by 2
1 0: Selects the CAN bus bit clock divided by 3
1 1: Selects the CAN bus bit clock divided by 4
0: Nothing is occurred
1: This bit is automatically set to "0" after
0: Nothing is occurred
1: This bit is automatically set to "0" after
16
16
the CiTSR register is set to "0000
the CiTEC and CiREC registers are
set to "00
2
" (no division mode). Or, set the PM24 bit
16
"
(3)
After Reset
XXXX 0000 XX01 0X01
XXXX 0000 XX01 0X01
Function
(2)
(2)
(1)
16
"
2
2
(3)
23. CAN Module
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW