M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 14

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

26. Electrical Characteristics ____________________ 425
27. Precautions ________________________________ 466
A-8
25.2 Functions to Prevent the Flash Memory from Rewriting ................................. 396
25.3 CPU Rewrite Mode ............................................................................................... 398
25.4 Standard Serial I/O Mode ..................................................................................... 417
25.5 Parallel I/O Mode .................................................................................................. 424
26.1 Electrical Characteristics (M32C/85) ................................................................... 425
26.2 Electrical Characteristics (M32C/85T) ................................................................. 454
27.1 Restrictions to Use M32C/85T (High-Reliability Version) ................................. 466
27.2 Reset ..................................................................................................................... 467
27.3 Bus ........................................................................................................................ 468
27.4 SFR ........................................................................................................................ 469
27.5 Clock Generation Circuit ..................................................................................... 470
27.6 Protection ............................................................................................................. 474
25.2.1 ROM Code Protect Function ........................................................................ 396
25.2.2 ID Code Verify Function ............................................................................... 396
25.3.1 EW Mode 0 ..................................................................................................... 398
25.3.2 EW Mode 1 ..................................................................................................... 398
25.3.3 Flash Memory Control Register (FMR0 Register and FMR1 Register) .... 399
25.3.4 Precautions in CPU Rewrite Mode .............................................................. 405
25.3.5 Software Commands .................................................................................... 407
25.3.6 Data Protect Function ................................................................................... 413
25.3.7 Status Register (SRD Register) ................................................................... 413
25.3.8 Full Status Check .......................................................................................... 415
25.4.1 ID Code Verify Function ............................................................................... 417
25.4.2 Circuit Application in Standard Serial I/O Mode ........................................ 422
25.5.1 Boot ROM Area.............................................................................................. 424
25.5.2 ROM Code Protect Function ........................................................................ 424
27.3.1 HOLD Signal .................................................................................................. 468
27.3.2 External Bus .................................................................................................. 468
27.4.1 100-Pin Package ............................................................................................ 469
27.4.2 Register Settings .......................................................................................... 469
27.5.1 CPU Clock...................................................................................................... 470
27.5.2 Sub Clock ...................................................................................................... 470
27.5.3 PLL Frequency Synthesizer ......................................................................... 471
27.5.4 External Clock ............................................................................................... 471
27.5.5 Clock Divide Ratio ........................................................................................ 471
27.5.6 Power Consumption Control ....................................................................... 471
__________