M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 388
![IC M32C MCU FLASH 100LQFP](/photos/12/22/122251/m30853fjgp_u3_sml.jpg)
M30853FJGP#U3
Manufacturer Part Number
M30853FJGP#U3
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30853FHFPD5.pdf
(94 pages)
3.M30853FHFPU3.pdf
(544 pages)
Specifications of M30853FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30853FJGP#U3M30853FJGP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M
R
R
e
E
23.2 CAN Clock
3
. v
J
2
Table 23.5 CAN Clock Settings
Figure 23.36 Accessing Procedure for CAN-Associated Registers
0
C
1
The CAN clock is the operating clock for the CAN module. f
f
clock. Refer to 9. Clock Generation Circuit for details.
23.2.1 Main Clock Direct Mode
9
C
CAN
C
8 /
f
0 .
B
C
o l
f
mode while the PM25 bit is set to "1" (main clock). Set the PM25 bit in CAN sleep mode.
Set the PM24 bit in the PM2 register to "1" (main clock) before accessing CAN-associated registers in
main clock direct mode. Do not enter wait mode or stop mode when the PM24 bit is set to "1".
Table 23.5 lists CAN clock settings. Figure 23.36 shows a flow chart of accessing procedure for CAN-
associated registers.
A
f
A
CAN
1
0
3
5
k c
N
N
0
G
3
J
has the same frequency as the main clock. The PM25 bit in the PM2 register determines the CAN
7
u
o r
becomes the CAN clock in main clock direct mode. The CAN module must enter main clock direct
0 -
. l
M
(
M
P
M
u
0
1
L
a
a
p
a
L
, 1
0
n i
n i
n i
3
C
(
C
C
2
M
C
o l
0
o l
o l
NOTES:
o l
3
k c
0
C
k c
k c
2
k c
5
o l
1. Waiting time varies depending on the CPU clock frequency before or after PM24 bit
C
k c
setting is changed.
i D
- High Frequency : Higher Frequency compared "before PM24 bit setting changes" with
- Low Frequency : Lower Frequency compared "before PM24 bit setting changes" with
8 /
Page 363
S
e r
, 5
o
t c
u
M
c r
M
3
e
o
Waiting Time
2
d
C
) e
f o
8 /
4
5
9
) T
4
"after PM24 bit setting changes"
"after PM24 bit setting changes"
C
R
M
e
C
g
0
M
0
0
0
Set the PM24 bit to "0" (clock selected
t s i
7
Wait until a clock oscillation stabilized
2 x High Frequency
Set the PM24 bit in the PM2 register
Access to CAN-associated registers
by the CM07 bit in the CM0 register)
0
Low Frequency
B
r e
t i
C
to "1" (main clock)
R
M
e
C
g
1
M
0
1
1
t s i
7
1
B
r e
Start
End
t i
Cycles
C
R
M
1
e
C
g
2
or f
M
0
0
0
t s i
1
2
B
r e
CAN
t i
can be selected as the CAN clock.
P
M
2
0
0
1
4
P
M
B
2
t i
R
e
g
t s i
P
M
r e
2
0
0
1
5
B
t i
23. CAN Module
M
M
R
1
1
C
M
e
C
0
0
D
g
- - -
D
0
0
C
0
t s i
1
1
4
D
0
0
b
r e
o t
2
2
s t i
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