M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 373

IC M32C MCU FLASH 100LQFP

M30853FJGP#U3

Manufacturer Part Number
M30853FJGP#U3
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30853FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
3
. v
J
2
Figure 23.24 C0GMR2, C0LMAR2 and C0LMBR2 Registers
0
C
1
9
0 .
8 /
B
0
3
5
0
3
G
J
7
u
o r
0 -
. l
CANi Global Mask Register Extended ID0
CANi Local Mask Register A Extended ID0
CANi Local Mask Register B Extended ID0
b7
u
0
1
NOTES:
p
, 1
0
b6
3
(
1. The CiGMR2, CiLMAR2 and CiLMBR2 registers can be accessed only when the BANKSEL bit in
2. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after
3. The C0LMAR2 register shares the same address with the C0MCTL2 register.
4. The C1LMAR2 register shares the same address with the C1MCTL2 register.
5. The C0LMBR2 register shares the same address with the C0MCTL10 register.
6. The C1LMBR2 register shares the same address with the C1MCTL10 register.
2
M
C1GMR2, C1LMAR2 and C1LMBR2 Registers
0
b5
the CiCTLR1 register is set to "1" (mask register selected).
reset, supplying the clock to the CAN module, and setting the BANKSEL bit to "0".
3
0
2
5
b4
C
8 /
Page 348
b3
, 5
b2
M
3
b1
2
C
b0
f o
8 /
4
5
(b7 - b4)
EID14M
EID15M
EID16M
EID17M
Symbol
9
) T
4
Symbol
C0GMR2, C1GMR2
C0LMAR2, C1LMAR2
C0LMBR2, C1LMBR2
Bit
Extended ID14
Extended ID15
Extended ID16
Extended ID17
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Name
Address
022A
0232
023A
16 (3)
16
16
(1)
, 02AA
(5)
0: No ID is verified
1: ID is verified
(1)
(1)
, 02B2
, 02BA
(i=0, 1)
16
16 (4)
16
(6)
Function
After Reset
XXXX 0000
XXXX 0000
XXXX 0000
(2)
2
2
2
23. CAN Module
RW
RW
RW
RW
RW

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