M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 128

IC M32C MCU FLASH 100LQFP

M30853FJGP#U3

Manufacturer Part Number
M30853FJGP#U3
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30853FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
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9.6 System Clock Protect Function
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The system clock protect function prohibits the CPU clock from changing clock sources when the main
clock is selected as the CPU clock source. This prevents the CPU clock from stopping the program crash.
When the PM21 bit in the PM2 register is set to "1" (clock change disable), the following bits cannot be
written to:
To use the system clock protect function, set the CM05 bit in the CM0 register to "0" (main clock oscillation)
and CM07 bit to "0" (main clock as BCLK clock source) and follow the procedure below.
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The CPU clock continues running when the WAIT instruction is executed.
(1) Set the PRC1 bit in the PRCR register to "1" (write enable).
(2) Set the PM21 bit in the PM2 register to "1" (protects the clock).
(3) Set the PRC1 bit in the PRCR register to "0" (write disable).
When the PM21 bit is set to "1", do not execute the WAIT instruction.
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• The CM02 bit, CM05 bit and CM07 bit in the CM0 register
• The CM10 bit and CM17 bit in the CM1 register
• The CM20 bit in the CM2 register
• All bits in the PLC0 and PLC1 registers
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9. Clock Generation Circuit

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