M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 387

IC M32C MCU FLASH 100LQFP

M30853FJGP#U3

Manufacturer Part Number
M30853FJGP#U3
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30853FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer:
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Quantity:
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M
R
R
e
E
3
. v
J
2
Figure 23.35 C0AFS Register and C1AFS Register
0
C
23.1.23 CANi Acceptance Filter Support Register (CiAFS Register)
1
9
0 .
8 /
B
When a received ID is "6F3
0
3
5
The CiAFS register enables prompt performance of the table search to determine the varidity of a
received ID. This function is for standard-formatted ID only.
0
3
G
J
7
u
o r
0 -
Data used to search a data table is
generated from a received ID in stan-
dard format. The table search with this
data determines whether or not a re-
ceived ID is valid.
. l
u
0
1
CANi Acceptance Filter Support Register
b15
p
, 1
0
3
(
NOTES:
2
M
0
3
1. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after
0
2
5
reset and supplying the clock to the CAN module.
C
Write to
the CiAFS register
Read from
the CiAFS register
b8
8 /
Page 362
, 5
Bit search information
b7
Write
Read
M
3
2
01
02
04
08
10
20
40
80
Divide it to 8 bits and 3 bits
C
f o
16
16
16
16
16
16
16
16
b0
8 /
16
4
5
CSID7 CSID6
"
b15
b15
9
Generates data to determine a received ID
Received ID
) T
b15
b15
4
0 0 1 1 0 0 1 1 0 0 0 1 1 0 1 1
0 0 0 0 1 0 0 0 1 1 0 1 1 1 1 0
Symbol
C0AFS
C1AFS
Bit search information
b7
0 0 0 0 0 0 0 1
0 0 0 0 0 0 1 0
0 0 0 0 0 1 0 0
0 0 0 0 1 0 0 0
0 0 0 1 0 0 0 0
0 0 1 0 0 0 0 0
0 1 0 0 0 0 0 0
1 0 0 0 0 0 0 0
SID5
SID5 SID4 SID3 SID2 SID1 SID0
CSID5 CSID4 CSID3
"08
SID4 SID3 SID2 SID1 SID0
3-8 decoding
Address search information
16
"
b3
SID10
1 1 0 1 1 1 1 0 0 1 1
"6"
Address
0245
0255
Function
"D"
b0
CSID2 CSID1 CSID0 SID10 SID9 SID8 SID7 SID6
Top+DE
Top+FE
Top+FF
Top+00
Top+01
b8
b8
16
16
3 low-order bits of received ID
- 0244
- 0254
8 bits
b7
b7
Address search information
16
16
16
16
16
"D"
"F"
00F
6F7
7F7
7FF
16
16
007
(i=0,1)
b8
"0"
"1"
"0"
"0"
"0"
b7
"E"
16
16
16
16
16
SID10SID9 SID8 SID7 SID6
0
1
2
3
4
5
6
7
b7
00E
7FE
006
6F6
7F6
16
16
16
16
16
16
16
16
b6
"0"
"0"
"0"
"0"
"0"
16
16
16
16
16
00D
7FD
005
6F5
7F5
"E"
"3"
3 bits
"0"
"0"
"0"
"0"
"1"
After Reset
0100
0100
b5
Bit search information
"3"
16
16
16
16
16
16
16
SID0
00C
7FC
004
6F4
7F4
b0
SID10 SID9 SID8 SID7 SID6
b0
"0"
"0"
"0"
"0"
"0"
b4
0000
Setting Range
16
16
16
16
16
(1)
i = 0, 1
7FB
003
00B
6F3
7F3
16
Because the value of the
3 bits is 3, b3 in the table
left is 1. (If the value of
the 3 bits is 4, b4 in the
table left is 1.)
"0"
"0"
"1"
"0"
"0"
b3
to FFFF
16
16
16
16
16
SID5 SID4 SID3
002
00A
6F2
7F2
7FA
"0"
"0"
"0"
"0"
"0"
b2
(i=0,1)
16
16
16
16
16
16
6F1
7F1
7F9
001
009
RW
RW
23. CAN Module
"1"
"0"
"0"
"0"
"0"
b1
b0
b0
16
16
16
16
16
6F0
7F0
7F8
000
008
"0"
"0"
"0"
"1"
"0"
b0
16
16
16
16
16

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