M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 13

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

24. Programmable I/O Ports _____________________ 370
25. Flash Memory Version _______________________ 394
23.2 CAN Clock ............................................................................................................. 363
23.3 Timing with CAN-Associated Registers ............................................................. 364
23.4 CAN Interrupts ...................................................................................................... 366
24.1 Port Pi Direction Register (PDi Register, i=0 to 15)........................................... 370
24.2 Port Pi Register (Pi Register, i=0 to 15) .............................................................. 370
24.3 Function Select Register Aj (PSj Register) (j=0 to 3, 5, 8, 9) ............................ 370
24.4 Function Select Register B0 to B3 (PSL0 to PSL3 Registers) ......................... 370
24.5 Function Select Register C (PSC, PSC2, PSC3 Registers) .............................. 371
24.6 Function Select Register D (PSD1 Register) ..................................................... 371
24.7 Pull-up Control Register 0 to 4 (PUR0 to PUR4 Registers) .............................. 371
24.8 Port Control Register (PCR Register) ................................................................ 371
24.9 Input Function Select Register (IPS and IPSA Registers) ................................ 371
24.10 Analog Input and Other Peripheral Function Input ......................................... 371
25.1 Memory Map ......................................................................................................... 395
23.1.12 CANi Slot Interrupt Mask Register (CiSIMKR Register) (i=0, 1) .............. 338
23.1.13 CANi Error Interrupt Mask Register (CiEIMKR Register) (i=0, 1) ............ 339
23.1.14 CANi Error Interrupt Status Register (CiEISTR Register) (i=0, 1) ........... 340
23.1.15 CANi Error Factor Register (CiEFR Register) (i=0, 1) .............................. 341
23.1.16 CANi Mode Register (CiMDR Register) (i=0, 1) ........................................ 342
23.1.17 CANi Single-Shot Control Register (CiSSCTLR Register) (i=0, 1) .......... 344
23.1.18 CANi Single-Shot Status Register (CiSSSTR Register) (i=0, 1) .............. 345
23.1.19 CANi Global Mask Register, CANi Local Mask Register A and CANi Local Mask
23.1.20 CANi Message Slot j Control Register (CiMCTLj Register) (i=0,1, j=0 to 15) . 353
23.1.21 CANi Slot Buffer Select Register (CiSBS Register) (i=0,1) ..................... 357
23.1.22 CANi Message Slot Buffer j (i=0,1, j=0,1) .................................................. 358
23.1.23 CANi Acceptance Filter Support Register (CiAFS Register) (i=0,1) ....... 362
23.2.1 Main Clock Direct Mode ............................................................................... 363
23.3.1 CAN Module Reset Timing ........................................................................... 364
23.3.2 CAN Transmit Timing ................................................................................... 364
23.3.3 CAN Receive Timing ..................................................................................... 365
23.3.4 CAN Bus Error Timing .................................................................................. 366
23.4.1 CAN1 Wake-Up Interrupt .............................................................................. 366
23.4.2 CANij Interrupts ............................................................................................ 366
25.1.1 Boot Mode ..................................................................................................... 396
Register B (CiGMRk, CiLMARk and CiLMBRk Registers) (i=0,1, k=0 to 4).... 346
A-7