M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 114

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
e
E
3
. v
J
2
Figure 9.10 Sub Clock Circuit Connection
0
C
1
9.1.2 Sub Clock
9
8 /
0 .
B
Sub clock oscillation circuit generates the sub clock. The sub clock becomes clock source of the CPU
clock and for the timers A and B. The same frequency, fc, as the sub clock can be output from the
CLK
The sub clock oscillation circuit is configured by connecting a crystal oscillator between the X
X
oscillation circuit in stop mode to reduce power consumption. An external clock can be applied to the X
pin. Figure 9.10 shows an example of a sub clock circuit connection. Circuit constants vary depending on
each oscillator. Use the circuit constant recommended by each oscillator manufacturer.
The sub clock stops after reset. The feedback resistor is separated from the oscillation circuit. When the
PD8_6 and PD8_7 bits in the PD8 register are set to "0" (input mode) and the PU25 bit in the PUR2
register is set to "0" (no pull-up), set the CM04 bit in the CM0 register to "1" (X
function). The sub clock oscillation circuit starts oscillating. To apply an external clock to the X
the CM04 bit to "1" when the PD8_7 bit is set to "0" and the PU25 bit to "0". The clock applied to the X
pin becomes a clock source of the sub clock.
When the CM07 bit in the CM0 register is set to "1" (sub clock) after the sub clock oscillation has stabi-
lized, the sub clock becomes a CPU clock source.
All clocks, including the sub clock, stop in stop mode. Refer to 9.5 Power Consumption Control for
details.
0
3
5
COUT
0
G
3
J
(Built-in Feedback Resistor)
7
u
OUT
o r
0 -
. l
u
0
1
pins. The circuit has a built-in feedback resistor. The feedback resistor is separated from the
p
, 1
0
pin.
3
Microcomputer
(
NOTES:
2
M
0
3
0
1. Place a damping resistor if required. Resistance values vary depending on the oscillator setting.
2
5
C
Use values recommended by each oscillator manufacturer.
Place a feedback resistor between X
placing the resistor externally.
X
COUT
8 /
X
V
Page 89
CIN
, 5
SS
M
3
2
Oscillator
C
f o
R
8 /
C
4
5
d
9
) T
(1)
4
C
C
COUT
CIN
CIN
and X
(Built-in Feedback Resistor)
COUT
Microcomputer
if the oscillator manufacturer recommends
X
C OUT
X
C IN
Open
V
V
CC
SS
External Clock
9. Clock Generation Circuit
CIN
-X
COUT
CIN
oscillation
CIN
pin, set
and
CIN
CIN