R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 109
R5F21324CNSP#U0
Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet
1.R5F21321CDSPU0.pdf
(605 pages)
Specifications of R5F21324CNSP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 80 of 573
Table 7.13
X: 0 or 1
Notes:
Table 7.14
X: 0 or 1
Notes:
Register PD3
Register
Setting
Setting
Value
Value
Bit
Bit
1.
2.
3.
1.
2.
3.
4.
Pulled up by setting the PU06 bit in the PUR0 register to 1.
Output drive capacity high by setting the DRR06 bit in the DRR0 register to 1.
N-channel open-drain output by setting the CSOS bit in the SSMR2 register to 1 (N-channel open-drain output).
Pulled up by setting the PU07 bit in the PUR0 register to 1.
Output drive capacity high by setting the DRR07 bit in the DRR0 register to 1.
N-channel open-drain output by setting the SOOS bit in the SSMR2 register to 1 (N-channel open-drain output) and setting the BIDE bit in the
SSMR2 register to 0 (standard mode).
N-channel open-drain output by setting the NCH bit in the U2C0 register to 1.
PD3_4
PD3_3
PD3
0
1
0
X
X
X
0
0
X
0
0
0
1
0
0
X
X
0
X
0
SSUIICSR
SSMR2
IICSEL
1
0
0
0
0
0
1
1
0
0
0
Port P3_3/INT3/TRCCLK/SCS/CTS2/RTS2/IVCMP3
Port P3_4/TRCIOC/SSI/RXD2/SCL2/TXD2/SDA2/IVREF3
CSS
X
X
X
X
0
0
X
X
X
X
X
0
0
0
0
0
1
0
1
0
0
0
Association between
SSI output
Modes and I/O Pins .)
INT3EN
INTEN
Communication Unit
(Refer to Table 24.4
Synchronous Serial
control
Communication
X
X
1
X
X
X
X
X
1
0
0
0
0
0
1
0
0
0
0
0
Other than 10b
TRCCLKSEL
SSI input
TRBRCSR
X
X
X
X
X
X
X
1
1
control
0
0
0
0
1
0
0
0
0
0
0
0
X
X
X
0
X
X
X
X
TRCPSR1
TRCIOC
than 10b
than 10b
than 10b
than 10b
X
X
X
X
X
1
1
1
Other
Other
Other
Other
SEL
X
X
X
X
X
X
X
X
2
1
X
X
X
X
X
0
0
0
TRCCR1
TCK
X
X
X
X
X
X
X
1
0
X
than 01b
than 01b
than 01b
than 01b
than 01b
X
X
X
X
1
0
0
RXD2
Other
Other
Other
Other
Other
SEL
X
X
X
X
X
X
X
X
0
1
U2SR0
X
X
X
X
0
1
1
CTS2SEL0
than 10b
than 10b
than 10b
than 10b
than 10b
than 10b
than 10b
U2SR1
X
X
1
1
1
TXD2
Other
Other
Other
Other
Other
Other
Other
SEL
X
X
0
0
0
0
1
1
0
X
X
0
0
0
2
X
X
X
X
X
X
X
0
0
1
0
X
X
X
X
X
X
2
Other than
Other than
U2MR
SMD
U2MR
SMD
000b
000b
X
X
X
X
X
X
X
X
1
1
0
1
1
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
0
1
0
1
0
0
X
X
X
X
X
0
X
U2SMR INTCMP
CRS CRD INT3CP0
IICM
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
1
1
U2CO
X
X
X
X
X
X
X
0
0
INT3
CP0
X
X
X
X
X
X
X
X
X
X
1
INTCMP
X
X
0
X
X
X
X
X
1
Pin Setting
Pin Setting
Table 7.24
Table 7.24
Timer RC
TRCIOC
TRCIOC
Refer to
Refer to
Setting
—
X
X
X
X
X
X
X
X
X
Input port
Output port
INT3 input
TRCCLK input
SCS input
SCS output
CTS2 input
RTS2 output
Comparator B3 input
(IVCMP3)
Function
Input port
Output port
TRCIOC
input
TRCIOC
output
SSI input
SSI output
RXD2 input
SCL2 input/
output
TXD2
output
SDA2 input/
output
Comparator B3
reference
voltage input
(IVREF3)
(1)
7. I/O Ports
Function
(1)
(1)
(2)
(2, 3)
(1)
(1)
(2)
(2)
(2, 4)
(2, 4)
(2, 4)
(1)
(1)
(1)
(2, 3)
(2)
(1)
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