R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 405

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 376 of 573
24.4
Figure 24.4
24.4.1
Figure 24.4 shows Initialization in Clock Synchronous Communication Mode. To initialize, set the TE bit in the
SSER register to 0 (transmit disabled) and the RE bit to 0 (receive disabled) before data transmission or
reception.
Set the TE bit to 0 and the RE bit to 0 before changing the communication mode or format.
Setting the RE bit to 0 does not change the contents of flags RDRF and ORER or the contents of the SSRDR
register.
Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Note:
SSER register
SSCRH register
1. Write 0 after reading 1 to set the ORER bit to 0.
SSMR2 register
SSMR register
SSMR2 register
SSSR register
SSCRH register
SSER register
Set bits CKS0 to CKS2
Set RSSTP bit
RE bit ← 1 (receive)
TE bit ← 1 (transmit)
Set bits RIE, TEIE, and TIE
Start
End
SCKS bit ← 1
Set SOOS bit
CPHS bit ← 0
CPOS bit ← 0
Set MLS bit
ORER bit ← 0
SSUMS bit ← 0
Set MSS bit
RE bit ← 0
TE bit ← 0
24. Synchronous Serial Communication Unit (SSU)
(1)

Related parts for R5F21324CNSP#U0