MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 1031

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
27.3.2.2
The FSEC register holds all bits associated with the security of the MCU and Flash module.
All bits in the FSEC register are readable but not writable.
During the reset sequence, the FSEC register is loaded with the contents of the Flash security byte in the
Flash configuration field at global address 0x7F_FF0F located in P-Flash memory (see
indicated by reset condition F in
phrase containing the Flash security byte during the reset sequence, all bits in the FSEC register will be
set to leave the Flash module in a secured state with backdoor key access disabled.
Freescale Semiconductor
KEYEN[1:0]
RNV[5:2}
SEC[1:0]
Offset Module Base + 0x0001
Reset
2. FDIV shown generates an FCLK frequency of 1.05 MHz
Field
7–6
5–2
1–0
W
R
Backdoor Key Security Enable Bits — The KEYEN[1:0] bits define the enabling of backdoor key access to the
Flash module as shown in
Reserved Nonvolatile Bits — The RNV bits should remain in the erased state for future enhancements.
Flash Security Bits — The SEC[1:0] bits define the security state of the MCU as shown in
Flash module is unsecured using backdoor key access, the SEC bits are forced to 10.
Flash Security Register (FSEC)
F
7
KEYEN[1:0]
= Unimplemented or Reserved
F
6
1. Preferred KEYEN state to disable backdoor key access.
KEYEN[1:0]
Figure 27-6. Flash Security Register (FSEC)
MC9S12XE-Family Reference Manual , Rev. 1.23
00
01
10
11
Figure
Table 27-10. FSEC Field Descriptions
Table
Table 27-11. Flash KEYEN States
F
5
27-11.
27-6. If a double bit fault is detected while reading the P-Flash
Status of Backdoor Key Access
F
4
RNV[5:2]
Description
DISABLED
DISABLED
DISABLED
ENABLED
Chapter 27 512 KByte Flash Module (S12XFTM512K3V1)
F
3
(1)
F
2
F
1
Table
Table
SEC[1:0]
27-12. If the
27-3) as
F
0
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