MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 789

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Chapter 22
Timer Module (TIM16B8CV2) Block Description
22.1
The basic timer consists of a 16-bit, software-programmable counter driven by a enhanced programmable
prescaler.
This timer can be used for many purposes, including input waveform measurements while simultaneously
generating an output waveform. Pulse widths can vary from microseconds to many seconds.
This timer contains 8 complete input capture/output compare channels and one pulse accumulator. The
input capture function is used to detect a selected transition edge and record the time. The output compare
function is used for generating output signals or for timer software delays. The 16-bit pulse accumulator
is used to operate as a simple event counter or a gated time accumulator. The pulse accumulator shares
timer channel 7 when in event mode.
Freescale Semiconductor
Revision
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Number
V02.05
V02.06
V02.07
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Introduction
Revision Date
26 Aug 2009
04 May 2010
9 Jul 2009
22.3.2.2/22-796
22.3.2.3/22-797
22.3.2.4/22-798
22.3.2.8/22-801
22.4.2/22-813
22.4.3/22-813
22.1.2/22-790
22.4.3/22-813
22.4.3/22-813
22.3.2.12/22-
22.3.2.13/22-
22.3.2.15/22-
22.3.2.16/22-
22.3.2.19/22-
22.3.2.15/22-
22.3.2.11/22-
Sections
Affected
805
805
807
808
810
807
804
MC9S12XE-Family Reference Manual Rev. 1.23
Table 22-1. Revision History
- Revised flag clearing procedure, whereby TEN or PAEN bit must be set
when clearing flags.
- Add fomula to describe prescaler
- Correct typo: TSCR ->TSCR1
- Correct reference: Figure 1-25 -> Figure 1-31
- Add description, “a counter overflow when TTOV[7] is set”, to be the
condition of channel 7 override event.
- Phrase the description of OC7M to make it more explicit
- Add
- in TCRE bit description part,add Note
- Add
Table 22-10
Figure 22-31
Description of Changes
789

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