MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 115

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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MC9S12XEP100MAL
0
1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
2.3.8
2.3.9
Freescale Semiconductor
Function
Address 0x0005 (PRR)
Address 0x0006 (PRR)
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
Altern.
Field
Reset
Reset
7-0
PD
W
W
R
R
Port D general purpose input/output data—Data Register
Port D pins 7 through 0 are associated with data I/O lines DATA[7:0] respectively in expanded modes.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
DDRC7
DATA7
Port D Data Register (PORTD)
Port C Data Direction Register (DDRC)
PD7
0
0
7
7
DDRC6
DATA6
PD6
0
0
6
6
Figure 2-7. Port C Data Direction Register (DDRC)
Table 2-9. PORTD Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-6. Port D Data Register (PORTD)
DDRC5
DATA5
PD5
0
0
5
5
DDRC4
DATA4
PD4
0
0
4
4
Description
DDRC3
DATA3
PD3
3
0
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
DDRC2
DATA2
PD2
0
0
2
2
Access: User read/write
Access: User read/write
DDRC1
DATA1
PD1
0
0
1
1
DDRC0
DATA0
PD0
0
0
0
0
115
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