MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 355

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Chapter 10
XGATE (S12XGATEV3)
10.1
The XGATE module is a peripheral co-processor that allows autonomous data transfers between the
MCU’s peripherals and the internal memories. It has a built in RISC core that is able to pre-process the
transferred data and perform complex communication protocols.
The XGATE module is intended to increase the MCU’s data throughput by lowering the S12X_CPU’s
interrupt load.
Figure 10-1
This document describes the functionality of the XGATE module, including:
10.1.1
XGATE Request
XGATE Channel
Freescale Semiconductor
Revision
Number
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
V03.22
V03.23
V03.24
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
XGATE registers
XGATE RISC core
Hardware semaphores
Interrupt handling
Debug features
Security
Instruction set
A service request from a peripheral module which is directed to the XGATE by the S12X_INT
module (see
priority level.
The resources in the XGATE module (i.e. Channel ID number, Priority level, Service Request
Vector, Interrupt Flag) which are associated with a particular XGATE Request.
Introduction
Revision Date
Glossary of Terms
gives an overview on the XGATE architecture.
14 Dec 2005
06 Oct 2005
17 Jan 2006
(Section 10.7,
Figure
(Section 10.8, “Instruction
(Section 10.6, “Debug
(Section 10.3, “Memory Map and Register
(Section 10.5,
10.9.2/10-465
10-1). Each XGATE request attempts to activate a XGATE channel at a certain
(Section 10.4.1, “XGATE RISC
Sections
Affected
(Section 10.4.4,
“Security”)
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 10-1. Revision History
“Interrupts”)
- Internal updates
- Updated code example
- Internal updates
Mode”)
“Semaphores”)
Set”)
Description of Changes
Core”)
Definition”)
355

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