MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 316
![IC MCU 16BIT 1M FLASH 112-LQFP](/photos/12/42/124253/mc9s12xep100mal_sml.jpg)
MC9S12XEP100MAL
Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XEP100MAL
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XEP100MAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XEP100MAL
Manufacturer:
FREESCALE
Quantity:
20 000
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Chapter 8 S12X Debug (S12XDBGV3) Module
8.3.2.4
Read: Anytime
Write: Anytime the module is disarmed.
This register configures the comparators for range matching.
316
Address: 0x0023
CDCM[1:0]
ABCM[1:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
3–2
1–0
W
R
C and D Comparator Match Control — These bits determine the C and D comparator match mapping as
described in
A and B Comparator Match Control — These bits determine the A and B comparator match mapping as
described in
Debug Control Register2 (DBGC2)
0
0
7
TRCMOD
TRANGE
TALIGN
= Unimplemented or Reserved
00
01
10
11
00
01
10
11
00
01
10
11
Table
Table
0
0
6
8-16.
8-17.
Table 8-13. TRCMOD Trace Mode Bit Encoding
Table 8-14. TALIGN Trace Alignment Encoding
Figure 8-6. Debug Control Register2 (DBGC2)
Table 8-12. TRANGE Trace Range Encoding
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 8-15. DBGC2 Field Descriptions
Trace only in address range from Comparator C to $7FFFFF
Trace only in address range from $00000 to Comparator D
Trace only in range from Comparator C to Comparator D
5
0
0
Trace buffer entries before and after trigger
Trace from all addresses (No filter)
Trigger at end of stored data
Trigger before storing data
0
0
4
Description
Tracing Range
Description
Description
Reserved
Pure PC
Normal
Loop1
Detail
0
3
CDCM
2
0
Freescale Semiconductor
0
1
ABCM
0
0
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