MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 175
![IC MCU 16BIT 1M FLASH 112-LQFP](/photos/12/42/124253/mc9s12xep100mal_sml.jpg)
MC9S12XEP100MAL
Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XEP100MAL
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XEP100MAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XEP100MAL
Manufacturer:
FREESCALE
Quantity:
20 000
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1. Read: Anytime.
1. Read: Anytime.
2.3.96
2.3.97
Freescale Semiconductor
Address 0x0373
Address 0x0374
Write: Anytime.
Write: Anytime.
RDRL
PERL
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port L reduced drive—Select reduced drive for outputs
This register configures the drive strength of output pins 7 through 0 as either full or reduced independent of the
function used on the pins. If a pin is used as input this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
Port L pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset all pull devices are enabled.
1 Pull device enabled.
0 Pull device disabled.
RDRL7
PERL7
Port L Reduced Drive Register (RDRL)
Port L Pull Device Enable Register (PERL)
0
1
7
7
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on PTL or PTIL registers, when changing the
DDRL register.
RDRL6
PERL6
Figure 2-95. Port L Pull Device Enable Register (PERL)
0
1
6
6
Figure 2-94. Port L Reduced Drive Register (RDRL)
Table 2-91. RDRL Register Field Descriptions
Table 2-92. PERL Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
RDRL5
PERL5
0
1
5
5
RDRL4
PERL4
NOTE
0
1
4
4
Description
Description
RDRL3
PERL3
3
0
3
1
Chapter 2 Port Integration Module (S12XEPIMV1)
RDRL2
PERL2
0
1
2
2
Access: User read/write
Access: User read/write
RDRL1
PERL1
0
1
1
1
RDRL0
PERL0
0
1
0
0
175
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