PEF 20954 HT V1.1 Infineon Technologies, PEF 20954 HT V1.1 Datasheet - Page 100

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PEF 20954 HT V1.1

Manufacturer Part Number
PEF 20954 HT V1.1
Description
IC ECHO CANCELLER DGTL TQFP144
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20954 HT V1.1

Function
Smart Integrated Digital Echo Canceller (SIDEC)
Interface
PCM, Serial, UCC
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
350mA
Power (watts)
900mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Double Talk Detection
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
PEF20954HTV1.1
SP000007505
SGMOD1
SPTP [6:0]
TSGRPP[7:0] (Addr.: 3AH): Test signal generator for receive path pattern,
Reset value = 55H
SGMOD0
RPTP[6:0]
The sign of the test sequence is determined by the following table. The amplitude is
given by TSGSPP[6:0] and TSGRPP[6;0]. Hence, rectified test signals are generated
(see
Table 36
Figure 28
HTIM[7:0] (Addr.: 3BH): High-Byte for Timer, Reset value = 00H
Data Sheet
TIM[15]
MOD0
TSGRPP[6:0]
SG
Figure
SGMOD1
0
0
1
1
TIM[14]
28).
TSGSPP[6:0]
TP[6]
SGMOD1/0 Configuration
Explanation of Test Pattern Generation (random sign signal)
RP
TEDEL
operation mode1 for signal generator (see
Send path test pattern amplitude, log, A-/µ-Law encoded
operation mode 0 for signal generator (see
receive path test pattern amplitude, log, A-/µ-Law encoded
TIM[13]
TP[5]
RP
SGMOD0
0
1
0
1
TIM[12]
TP[4]
RP
100
Test Signal Sign changes
according to:
2105 Hz
2105 Hz inverted
2010 Hz
random sequence
TIM[11]
TP[3]
RP
TIM[10]
TP[2]
RP
Table
Table
Register Description
TIM[9]
TP[1]
36)
36)
RP
Rev. 2, 2004-07-28
time
PEB 20954
PEF 20954
TIM[8]
TP[0]
RP
time

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