PEF 20954 HT V1.1 Infineon Technologies, PEF 20954 HT V1.1 Datasheet - Page 153

• Manufacturer Part Number: PEF 20954 HT V1.1
• Description: IC ECHO CANCELLER DGTL TQFP144
• Manufacturer: Infineon Technologies

Specifications of PEF 20954 HT V1.1

• Function: Smart Integrated Digital Echo Canceller (SIDEC)
• Interface: PCM, Serial, UCC
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 350mA
• Power (watts): 900mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Double Talk Detection
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF20954HTV1.1; SP000007505

Table 46
No.
12a
12b
13a
13b
14a
14b
15a
15b
16a
16b
17a
17b
18a
18b
19a
19b
20a
Data Sheet
Parameter
Write data setup before CS rising edge if WR
asserted
Write data setup before WR rising edge if CS
asserted
Write data hold after CS rising edge if WR
asserted
Write data hold after WR rising edge if CS
asserted
CS rising edge before ALE falling edge if WR
asserted
WR rising edge before ALE falling edge if CS
asserted
RDY asserted after CS active if WR asserted
or DS asserted and RW='0'
RDY asserted, if CS asserted, after WR
active or DS active and RW='0'
Address valid before CS active if RD
asserted
Address valid before RD active if CS
asserted
Address hold after CS active if RD asserted 100
Address hold after RD active if CS asserted 100
Address setup before CS rising edge if WR
asserted
Address setup before WR rising edge if CS
asserted
Address hold after CS rising edge if WR
asserted
Address hold after WR rising edge if CS
asserted
ALE falling edge before CS active if DS
asserted and RW = '1'
Prliminary Microprocessor Interface Timing Values (cont’d)
153
min.
25
25
20
20
20
20
30
30
0
0
25
25
20
20
0
Limit Values
Electrical Characteristics
max.
90
90
Rev. 2, 2004-07-28
PEB 20954
PEF 20954
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns