PEF 20954 HT V1.1 Infineon Technologies, PEF 20954 HT V1.1 Datasheet - Page 53

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PEF 20954 HT V1.1

Manufacturer Part Number
PEF 20954 HT V1.1
Description
IC ECHO CANCELLER DGTL TQFP144
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20954 HT V1.1

Function
Smart Integrated Digital Echo Canceller (SIDEC)
Interface
PCM, Serial, UCC
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
350mA
Power (watts)
900mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Double Talk Detection
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
PEF20954HTV1.1
SP000007505
Figure 14
In the master clock mode with 8.192 MHz clock
clock is supplied by the VCO. The SIDEC provides a controlling voltage for the VCO in
order to synchronize the CLK32 to the system clock SCLKI.
SDECI is not connected and the SDECO can be connected to other SIDECs.
Data Sheet
SCLKI
8.192MHz
SDECI n.c.
Master Clock Mode with External 8.192 MHz Clock
VCO
SIDEC
Master Clock Mode 32MHz with 8MHz
53
(Figure
14), the 32.768 MHz operating
SDECO (to slave)
Operational Description
CLK4O
Rev. 2, 2004-07-28
PEB 20954
PEF 20954

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