PEF 20954 HT V1.1 Infineon Technologies, PEF 20954 HT V1.1 Datasheet - Page 155
PEF 20954 HT V1.1
Manufacturer Part Number
PEF 20954 HT V1.1
Description
IC ECHO CANCELLER DGTL TQFP144
Manufacturer
Infineon Technologies
Datasheet
1.PEB_20954_HT_V1.1.pdf
(164 pages)
Specifications of PEF 20954 HT V1.1
Function
Smart Integrated Digital Echo Canceller (SIDEC)
Interface
PCM, Serial, UCC
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
350mA
Power (watts)
900mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Double Talk Detection
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
PEF20954HTV1.1
SP000007505
SP000007505
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Table 46
No.
29b
30a
30b
31a
31b
32a
32b
33a
33b
34a
34b
35a
35b
Data Sheet
Parameter
Write data setup before DS rising edge if CS
asserted and RW = '0'
Write data hold after CS rising edge if DS
asserted and RW = '0'
Write data hold after DS rising edge if CS
asserted and RW = '0'
CS rising edge before ALE falling edge if DS
asserted and RW = '0'
DS rising edge before ALE falling edge if CS
asserted and RW = '0'
Address valid before CS active if DS
asserted and RW = '1'
Address valid before DS active if CS
asserted and RW = '1'
Address hold after CS active if DS asserted
and RW='1'
Address hold after DS active if CS asserted
and RW='1'
Address setup before CS rising edge if DS
asserted and RW = '0'
Address setup before DS rising edge if CS
asserted and RW = '0'
Address hold after CS rising edge if DS
asserted and RW = '0'
Address hold after DS rising edge if CS
asserted and RW = '0'
Prliminary Microprocessor Interface Timing Values (cont’d)
155
min.
20
20
20
20
20
0
0
100
100
25
25
20
20
Limit Values
Electrical Characteristics
max.
Rev. 2, 2004-07-28
PEB 20954
PEF 20954
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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