PEF 20954 HT V1.1 Infineon Technologies, PEF 20954 HT V1.1 Datasheet - Page 99

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PEF 20954 HT V1.1

Manufacturer Part Number
PEF 20954 HT V1.1
Description
IC ECHO CANCELLER DGTL TQFP144
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20954 HT V1.1

Function
Smart Integrated Digital Echo Canceller (SIDEC)
Interface
PCM, Serial, UCC
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
350mA
Power (watts)
900mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Double Talk Detection
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
PEF20954HTV1.1
SP000007505
terminated by the software by resetting the bit TESTTIMER.UPTEST. If the channel that
is background tested by the software suddenly becomes enabled by external sources
before the test is terminated an interrupt is generated that informs the software to abort
the test immediately.
CTRLTEST[7:0] (Addr.: 38H): Control of test channel, Reset value = 00H
TFREEZE
TNLPDIS
TATTDIS
TSINDIS
TEN
TALAW
TEDEL [1:0]
Note: For the internal functionality of the channel that is tested in the background all
external control sources have no effect.
TSGSPP[7:0] (Addr.: 39H): Test signal generator for send path pattern,
Reset value = 55H
Data Sheet
FREEZE
MOD1
SG
T
SPTP[6]
NLPDIS
T
Freeze of speech control unit and H-Register in selected test
channel:
'1': speech control unit and H-Register are frozen
'0': normal operation
NLP disable (bypass) in selected test channel:
'1': NLP disabled
'0': normal operation
Disable of output attenuator in selected test channel:
'1': Attenuator disabled
'0': normal operation, according to setting of register CONFPCM
Disable of "no speech" detection in selected test channel:
'1': "no speech" detection disabled
'0': normal operation
En/Disable of selected test channel:
'1': test channel enabled
'0': test channel disabled (H-Register and Attenuation meters reset)
PCM encoding Law selection of selected test channel:
'1': test channel A-Law encoded
'0': test channel µ-Law encoded
end echo delay for test pattern:
"11": 7*125 s
"10": 6*125 s
"01": 5*125 s
"00": 4*125 s
SPTP[5]
ATTDIS
T
SPTP[4]
SINDIS
T
99
SPTP[3]
EN
T
SPTP[2]
ALAW
T
Register Description
EDEL[1]
SPTP[1]
Rev. 2, 2004-07-28
T
PEB 20954
PEF 20954
EDEL[0]
SPTP[0]
T

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