PEF 20954 HT V1.1 Infineon Technologies, PEF 20954 HT V1.1 Datasheet - Page 54

• Manufacturer Part Number: PEF 20954 HT V1.1
• Description: IC ECHO CANCELLER DGTL TQFP144
• Manufacturer: Infineon Technologies

Specifications of PEF 20954 HT V1.1

• Function: Smart Integrated Digital Echo Canceller (SIDEC)
• Interface: PCM, Serial, UCC
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 350mA
• Power (watts): 900mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Double Talk Detection
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF20954HTV1.1; SP000007505

PEB 20954
PEF 20954
Operational Description
SCLKI
SIDEC
CLK4O
SDECI
Slave Mode with ext. 8 MHz
Figure 15
Slave Clock Mode with External 8.192 MHz and 32.768 MHz
In the slave clock mode the 8.192 MHz and the 32.768 MHz clock have to be
synchronous and phase aligned (e.g. SCLKI has been derived from CLK32 by some
external device). There is no internal synchronization between SCLKI and CLK32.
SDECI is needed for correct phase alignment of SCLKI to the internal system clock.
CLK4O is a 4.096 MHz system clock output for subsequent circuits, derived from SCLKI
Data Sheet
54
Rev. 2, 2004-07-28