PEF 20954 HT V1.1 Infineon Technologies, PEF 20954 HT V1.1 Datasheet - Page 67

• Manufacturer Part Number: PEF 20954 HT V1.1
• Description: IC ECHO CANCELLER DGTL TQFP144
• Manufacturer: Infineon Technologies

Specifications of PEF 20954 HT V1.1

• Function: Smart Integrated Digital Echo Canceller (SIDEC)
• Interface: PCM, Serial, UCC
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 350mA
• Power (watts): 900mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Double Talk Detection
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF20954HTV1.1; SP000007505

4.2.7
The SIDEC Microprocessor Interface supports both, Intel and Motorola mode. In each
mode the address can be provided either through the multiplexed address/data or a
parallel address bus. In multiplexed mode the address is always sampled with the falling
edge of the address latch enable signal on the lower 7 bits of the multiplexed address/
data bus. hence, adresses from 00H to 7FH are possible.
Read and write access in Intel mode is controlled by the assigned read and write signals.
In Motorola mode it is provided by the data strobe and read/write signal.
The chip select signal is internally simply 'ored' with the read and write signal in Intel
mode and with the data strobe signal in Motorola mode, thus enabling register access
through chip select controlled Microprocessor cycles.
For fast processors there is also a ready/acknowledgment signal provided in order to
eliminate the need for processor configured wait state insertion.
To write a value in a write protected register the value 95H needs to be written in the
register Write Protection.
4.3
4.3.1
The adaptive filtering algorithm implemented in the SIDEC is some derivative form of the
normalized LMS (least mean square) adaptive algorithm that utilizes an adaptive step
range.
4.3.2
The SIDEC filter consist of a full-tapped 511 step transversal filter that can be limited to
shorter impulse responses/echo delays for increased quality.
The filter coefficients can be fully monitored through the P-Interface.
4.3.3
Other than with ordinary LMS algorithms the SIDEC the filter coefficients (H-register) do
not get updated directly with a fixed update step size, but instead the patented adaptive
algorithm of the SIDEC utilizes so called auxiliary coefficients that adaptively control the
update step size of (main) coefficients. This yields a much more stable operation and
allows for the implementation of an additional fast convergence (turbo) mode that results
in rapid convergence even in the presence of double talk.
Please note that turbo mode is a status that is individual for each single coefficient. The
turbo mode indicator (monitor) only shows that at least one coefficient update works in
turbo mode.
Data Sheet
Microprocessor Interface
Operational functions overview
Adaptive filter function
Filter
Filter coefficient adaptation
67
Operational Description
Rev. 2, 2004-07-28
PEB 20954
PEF 20954